ports_def.h

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00001 /* asm-m68hc12/ports_def.h -- Definition of 68HC12 ports
00002    Copyright 2000 Free Software Foundation, Inc.
00003    Written by Stephane Carrez (stcarrez@worldnet.fr)
00004 
00005 This file is part of GDB, GAS, and the GNU binutils.
00006 
00007 GDB, GAS, and the GNU binutils are free software; you can redistribute
00008 them and/or modify them under the terms of the GNU General Public
00009 License as published by the Free Software Foundation; either version
00010 1, or (at your option) any later version.
00011 
00012 GDB, GAS, and the GNU binutils are distributed in the hope that they
00013 will be useful, but WITHOUT ANY WARRANTY; without even the implied
00014 warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See
00015 the GNU General Public License for more details.
00016 
00017 You should have received a copy of the GNU General Public License
00018 along with this file; see the file COPYING.  If not, write to the Free
00019 Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  */
00020 
00021 #ifndef _M68HC12_PORTS_DEF_H
00022 #define _M68HC12_PORTS_DEF_H
00023 
00024 /* Flags for the definition of the 68HC11 & 68HC12 CCR.  */
00025 #define M6811_S_BIT     0x80    /* Stop disable */
00026 #define M6811_X_BIT     0x40    /* X-interrupt mask */
00027 #define M6811_H_BIT     0x20    /* Half carry flag */
00028 #define M6811_I_BIT     0x10    /* I-interrupt mask */
00029 #define M6811_N_BIT     0x08    /* Negative */
00030 #define M6811_Z_BIT     0x04    /* Zero */
00031 #define M6811_V_BIT     0x02    /* Overflow */
00032 #define M6811_C_BIT     0x01    /* Carry */
00033 
00034 /* 68HC11 register address offsets (range 0..0x3F or 0..64).
00035    The absolute address of the I/O register depends on the setting
00036    of the M6811_INIT register.  At init time, the I/O registers are
00037    mapped at 0x1000.  Address of registers is then:
00038 
00039    0x0000 + M6812_xxx
00040 */
00041 #define M6812_PORTA     0x00    /* Port A register */
00042 #define M6812_PORTB     0x01    /* Port B register */
00043 #define M6812_DDRA      0x02    /* Data Direction Port A */
00044 #define M6812_DDRB      0x03    /* Data Direction Port A */
00045 #define M6812__RES4     0x04
00046 #define M6812__RES5     0x05
00047 #define M6812__RES6     0x06
00048 #define M6812__RES7     0x07
00049 #define M6812_PORTE     0x08    /* Port E register */
00050 #define M6812_DDRE      0x09    /* DAta Direction Port E */
00051 #define M6812_PEAR      0x0A
00052 #define M6812_MODE      0x0B
00053 #define M6812_PUCR      0x0C
00054 #define M6812_RDRIV     0x0D    /* Reduced Driver Register */
00055 #define M6812__RESE     0x0E
00056 #define M6812__RESF     0x0F
00057 #define M6812_INITRM    0x10    /* Ram mapping */
00058 #define M6812_INITRG    0x11    /* Register mapping */
00059 #define M6812_INITEE    0x12    /* Eeprom mapping */
00060 #define M6812_MISC      0x13
00061 #define M6812_RTICTL    0x14
00062 #define M6812_RTIFLG    0x15
00063 #define M6812_COPCTL    0x16    /* COP control register */
00064 #define M6812_COPRST    0x17    /* COP reset register */
00065 #define M6812_ITST0     0x18
00066 #define M6812_ITST1     0x19
00067 #define M6812_ITST2     0x1A
00068 #define M6812_ITST3     0x1B
00069 #define M6812__RES1C    0x1C
00070 #define M6812__RES1D    0x1D
00071 #define M6812_INTCR     0x1E
00072 #define M6812_HPRIO     0x1F
00073 #define M6812_BRKCT0    0x20
00074 #define M6812_BRKCT1    0x21
00075 #define M6812_BRKAH     0x22
00076 #define M6812_BRKAL     0x23
00077 #define M6812_BRKDH     0x24
00078 #define M6812_BRKDL     0x25
00079 #define M6812__RES26    0x26
00080 #define M6812__RES27    0x27
00081 #define M6812_PORTJ     0x28
00082 #define M6812_PORTH     0x29
00083 #define M6812_DDRJ      0x2A
00084 #define M6812_DDRH      0x2B
00085 #define M6812_KWIEJ     0x2C
00086 #define M6812_KWIEH     0x2D
00087 #define M6812_KWIFJ     0x2E
00088 #define M6812_KWIFH     0x2F
00089 #define M6812_KWPJ      0x30
00090 #define M6812_KWPH      0x31
00091 #define M6812__RES32    0x32
00092 #define M6812__RES33    0x33
00093 #define M6812__RES34    0x34
00094 #define M6812__RES35    0x35
00095 #define M6812__RES36    0x36
00096 #define M6812__RES37    0x37
00097 #define M6812_SYNR      0x38
00098 #define M6812_REFDV     0x39
00099 #define M6812_CGTFLG    0x3A
00100 #define M6812_PLLFLG    0x3B
00101 #define M6812_PLLCR     0x3C
00102 #define M6812_CLKSEL    0x3D
00103 #define M6812_SLOW      0x3E
00104 #define M6812_CGTCTL    0x3F
00105 #define M6812_PWCLK     0x40
00106 #define M6812_PWPOL     0x41
00107 #define M6812_PWEN      0x42
00108 #define M6812_PWPRES    0x43
00109 #define M6812_PWSCAL0   0x44
00110 #define M6812_PWSCNT0   0x45
00111 #define M6812_PWSCAL1   0x46
00112 #define M6812_PWSCNT1   0x47
00113 #define M6812_PWCNT0    0x48
00114 #define M6812_PWCNT1    0x49
00115 #define M6812_PWCNT2    0x4A
00116 #define M6812_PWCNT3    0x4B
00117 #define M6812_PWPER0    0x4C
00118 #define M6812_PWPER1    0x4D
00119 #define M6812_PWPER2    0x4E
00120 #define M6812_PWPER3    0x4F
00121 #define M6812_PWDTY0    0x50
00122 #define M6812_PWCTL     0x51
00123 #define M6812_PWTST     0x52
00124 #define M6812_PORTP     0x53
00125 #define M6812_DDRP      0x54
00126 
00127 #define M6812_ATD0CTL0  0x60
00128 #define M6812_ATD0CTL1  0x61
00129 #define M6812_ATD0CTL2  0x62
00130 #define M6812_ATD0CTL3  0x63
00131 #define M6812_ATD0CTL4  0x64
00132 #define M6812_ATD0CTL5  0x65
00133 #define M6812_ATDOSTAT0 0x66
00134 #define M6812_ATDOSTAT1 0x67
00135 #define M6812_ATDOTESTH 0x68
00136 #define M6812_ATDOTESTL 0x69
00137 
00138 #define M6812_PORTAD0   0x6F
00139 #define M6812_ADR00H    0x70
00140 #define M6812_ADR00L    0x71
00141 #define M6812_ADR01H    0x72
00142 #define M6812_ADR01L    0x73
00143 #define M6812_ADR02H    0x74
00144 #define M6812_ADR02L    0x75
00145 #define M6812_ADR03H    0x76
00146 #define M6812_ADR03L    0x77
00147 #define M6812_ADR04H    0x78
00148 #define M6812_ADR04L    0x79
00149 #define M6812_ADR05H    0x7A
00150 #define M6812_ADR05L    0x7B
00151 #define M6812_ADR06H    0x7C
00152 #define M6812_ADR06L    0x7D
00153 #define M6812_ADR07H    0x7E
00154 #define M6812_ADR07L    0x7F
00155 #define M6812_TIOS      0x80
00156 
00157 #define M6812_CFORC     0x81
00158 #define M6812_OC7M      0x82
00159 #define M6812_OC7D      0x83
00160 #define M6812_TCNT      0x84
00161 #define M6812_TCNTH     0x84
00162 #define M6812_TCNTL     0x85
00163 #define M6812_TSCR      0x86
00164 #define M6812_TQCR      0x87
00165 #define M6812_TCTL1     0x88
00166 #define M6812_TCTL2     0x89
00167 #define M6812_TCTL3     0x8A
00168 #define M6812_TCTL4     0x8B
00169 #define M6812_TMSK1     0x8C
00170 #define M6812_TMSK2     0x8D
00171 #define M6812_TFLG1     0x8E
00172 #define M6812_TFLG2     0x8F
00173 #define M6812_TC0       0x90
00174 #define M6812_TC1       0x92
00175 #define M6812_TC2       0x94
00176 #define M6812_TC3       0x96
00177 #define M6812_TC4       0x98
00178 #define M6812_TC5       0x9A
00179 #define M6812_TC6       0x9C
00180 #define M6812_TC7       0x9E
00181 #define M6812_PACTL     0xA0
00182 #define M6812_PAFLG     0xA1
00183 #define M6812_PACN3     0xA2
00184 #define M6812_PACN2     0xA3
00185 #define M6812_PACN1     0xA4
00186 #define M6812_PACN0     0xA5
00187 #define M6812_MCCTL     0xA6
00188 #define M6812_MCFLG     0xA7
00189 #define M6812_ICPAR     0xA8
00190 #define M6812_DLYCT     0xA9
00191 #define M6812_ICOVW     0xAA
00192 #define M6812_ICSYS     0xAB
00193 #define M6812__RESAC    0xAC
00194 #define M6812_TIMTST    0xAD
00195 #define M6812_PORTT     0xAE
00196 #define M6812_DDRT      0xAF
00197 #define M6812_PBCTL     0xB0
00198 #define M6812_PBFLG     0xB1
00199 #define M6812_PA3H      0xB2
00200 #define M6812_PA2H      0xB3
00201 #define M6812_PA1H      0xB4
00202 #define M6812_PA0H      0xB5
00203 #define M6812_MCCNT     0xB6
00204 #define M6812_TC0H      0xB8
00205 #define M6812_TC1H      0xBA
00206 #define M6812_TC2H      0xBC
00207 #define M6812_TC3H      0xBE
00208 #define M6812_SC0BD     0xC0
00209 #define M6812_SC0BDH    0xC0
00210 #define M6812_SC0BDL    0xC1
00211 #define M6812_SC0CR1    0xC2
00212 #define M6812_SC0CR2    0xC3
00213 #define M6812_SC0SR1    0xC4
00214 #define M6812_SC0SR2    0xC5
00215 #define M6812_SC0DRH    0xC6
00216 #define M6812_SC0DRL    0xC7
00217 #define M6812_SC1BD     0xC8
00218 #define M6812_SC1BDH    0xC8
00219 #define M6812_SC1BDL    0xC9
00220 #define M6812_SC1CR1    0xCA
00221 #define M6812_SC1CR2    0xCB
00222 #define M6812_SC1SR1    0xCC
00223 #define M6812_SC1SR2    0xCD
00224 #define M6812_SC1DRH    0xCE
00225 #define M6812_SC1DRL    0xCF
00226 #define M6812_SP0CR1    0xD0
00227 #define M6812_SP0CR2    0xD1
00228 #define M6812_SP0BR     0xD2
00229 #define M6812_SP0SR     0xD3
00230 #define M6812__RESD4    0xD4
00231 
00232 
00233 /* Flags of the SCxCR1 register.  */
00234 #define M6812_LOOPS     0x80    /* SCI Loop Mode/Single Wire Mode Enable */
00235 #define M6812_WOMS      0x40    /* Wired-Or Mode for Serial Pins */
00236 #define M6812_RSRC      0x20    /* Receiver source */
00237 #define M6812_M         0x10    /* SCI Character length */
00238 #define M6812_WAKE      0x08    /* Wake up method select (0=idle, 1=addr mark) */
00239 #define M6812_ILT       0x04    /* Idle Line Type (0=short, 1=long) */
00240 #define M6812_PE        0x02    /* Parity Enable */
00241 #define M6812_PT        0x01    /* Parity Type (0=even, 1=odd) */
00242 
00243 /* Flags of the SCxCR2 register.  */
00244 #define M6812_TIE       0x80    /* Transmit Interrupt enable */
00245 #define M6812_TCIE      0x40    /* Transmit Complete Interrupt Enable */
00246 #define M6812_RIE       0x20    /* Receive Interrupt Enable */
00247 #define M6812_ILIE      0x10    /* Idle Line Interrupt Enable */
00248 #define M6812_TE        0x08    /* Transmit Enable */
00249 #define M6812_RE        0x04    /* Receive Enable */
00250 #define M6812_RWU       0x02    /* Receiver Wake Up */
00251 #define M6812_SBK       0x01    /* Send Break */
00252 
00253 /* Flags of the SCxSR1 register.  */
00254 #define M6812_TDRE      0x80    /* Transmit Data Register Empty */
00255 #define M6812_TC        0x40    /* Transmit Complete */
00256 #define M6812_RDRF      0x20    /* Receive Data Register Full */
00257 #define M6812_IDLE      0x10    /* Idle Line Detect */
00258 #define M6812_OR        0x08    /* Overrun Error */
00259 #define M6812_NF        0x04    /* Noise Flag */
00260 #define M6812_FE        0x02    /* Framing Error */
00261 #define M6812_PF        0x01    /* Parity Error flag */
00262 
00263 /* Flags of the SCxSR2 register.  */
00264 #define M6812_RAF       0x01    /* Receiver Active Flag */
00265 
00266 /* Flags in the SCxDRH register */
00267 #define M6812_R8        0x80    /* Receive Bit 8 */
00268 #define M6812_T8        0x40    /* Transmit bit 8 */
00269 
00270 
00271 #define M6812_IO_SIZE   (0x3ff)
00272 
00273 /* The I/O registers are represented by a volatile array.
00274    Address if fixed at link time.  */
00275 extern volatile unsigned char _io_ports[];
00276 
00277 #endif /* _M68HC12_PORTS_DEF_H */
00278 

Description | Download | Table of Contents | Modules | Compound List | File List | Functions

    Last modified,
    Apr 16, 2001
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